PinMAME reports logical active state on this platform. A consumer must not invert again. Whether a real switch is normally closed stays recorded per device as a physical fact, so a recreation can build the right hardware without changing what the emulator reports.
Address groups
Coin-door, switch-matrix, Fliptronic flipper, and optional custom switch column inputs
Addresses 1-8 are the four coin chutes and the four coin-door service buttons in printed row order (internal array column 0, CORE_COINDOORSWCOL). Public matrix addresses use WPC column/row notation 11-88, where the left digit is the drive column (internal array index 1-8) and the right digit is the return row 1-8; wpc_m2sw(col,row) = col*10+row+1. Column indices 9 and 10 (public 91-98/101-108) are a gap in the base allocation that this generation leaves unused unless a specific driver's own getSol/switch-read hook independently claims part of it. This generation always has Fliptronic flipper inputs at internal column 11 (CORE_FLIPPERSWCOL), so 111-118 are the eight EOS/button positions in WPC_swF1..WPC_swF8 order: 111 lower-right EOS, 112 lower-right button, 113 lower-left EOS, 114 lower-left button, 115 upper-right EOS, 116 upper-right button, 117 upper-left EOS, 118 upper-left button -- exactly as on WPC-95 and WPC-Fliptronic, and a driver with no upper flippers is free to repurpose 115-118 for other switch-matrix-column-11 hardware entirely (e.g. opto drop targets or a ramp-made sensor wired through the same physical column). A driver may declare one or more additional custom switch columns through core_tGameData hw.swCol; PinMAME's fixed custom-column start is internal array index CORE_CUSTSWCOL = CORE_STDSWCOLS = 12 (src/wpc/core.h), one column beyond the Fliptronic column, so the same col*10+row+1 formula reported through the CORE_CUSTSWNO(c,r) macro places the FIRST declared custom column at public 121-128, a second at 131-138, and so on; a definition declares only the addresses its own machine's custom board actually wires. This numbering is a fixed core.h offset, not a driver-visible '9th column' printed silkscreen number -- a printed board schematic that labels its own connector 'switch column 9' is documenting the physical wiring harness, not the PinMAME public address, and any such printed number must be captured as a manual.address alias rather than assumed equal to the public switch number. Unlike WPC-95, this generation's WPC_FLIPPERS register read (src/wpc/wpc.c, case WPC_FLIPPERS, gated on (gen & GENWPC_HASWPC95) == 0) unconditionally returns the bitwise complement of the entire flipper switch matrix column regardless of hardware generation, so the public Fliptronic state is already normalized here exactly as it is on WPC-95 via WPC_FLIPPERSW95; a recreation must not re-invert either range.
CPU-board option and country configuration bits
pinmame.input.dip
DIP switch
Legal addresses
1 … 88 slots
Transports
libpinmamechannel=dip
Standard, state, Fliptronic, and game-specific custom outputs
This generation exposes standard drivers 1-28 (src/wpc/core.c core_getSol, solNo <= 28); 29-30 mirror two WPC J111 general-purpose GPIO bits and 31-32 the same remap (core_getSol solNo <= 32 branch, 'Remap WPC GameOn/J111 GPIO', gated on GEN_ALLWPC, not WPC95-specific), with 31 PinMAME's synthetic fast-flip game-on state taken from the driver's RAM flag when wpc_set_fastflip_addr is set and 32 normally zero. 33-36 are driver-specific outputs at solenoids2 bits 4-7 (core_getSol solNo <= 36 branch): on a driver that sets FLIP_SOL(FLIP_UR)/FLIP_SOL(FLIP_UL) these are the Fliptronic upper-flipper power/hold pairs (33/34 upper-right, 35/36 upper-left), but a driver with no upper flippers is free to drive ordinary coils through the same four addresses instead, exactly like the switch-matrix column-11 repurposing above. 45-48 are the Fliptronic lower-flipper circuits (45/46 lower-right power/hold, 47/48 lower-left power/hold), identically addressed to WPC-95. UNLIKE WPC-95/WPC-95DCS, this generation has no integrated LPDC board, so 37-44 are not a duplicated general-purpose output range: pinned PinMAME's core_getSol dispatch (src/wpc/core.c, the '37-44 WPC95 & S11 extra' branch) only serves that range for GEN_WPC95/GEN_WPC95DCS/GEN_ALLS11, and returns constant 0 for this generation, so 37-44 are simply unused address space here unless a specific driver's own getSol hook independently claims part of it. 49 is PinMAME's simulator-only ball-shooter channel and 50 is reserved before the first custom-output boundary (CORE_FIRSTCUSTSOL = 51). Above that boundary, 51 upward are the game-specific custom solenoids a driver may publish through its own core_tGameData.hw.getSol handler, up to as many as its own hw.custSol count declares (CORE_CUSTSOLNO(n) = CORE_FIRSTCUSTSOL - 1 + n); a definition declares only the addresses its own machine publishes. A driver's own custom-solenoid board may carry its own silkscreened item numbers that do not match this public address space, and any such printed manual item number must be captured as a manual.address alias rather than assumed equal to the public solenoid number.
Eight-by-eight controlled-lamp matrix with optional auxiliary columns
PinMAME applies the shared wpc_sw2m/wpc_m2sw conversion to lamps (src/wpc/wpc.c MDRV_LAMP_CONV). ChangedLamps therefore reports public matrix addresses 11-88 rather than sequential indices, where the left digit is the drive column and the right digit is the return row. A driver may declare additional lamp columns through core_tGameData hw.lampCol; a definition declares only the columns its own machine populates.
Address ranges, transports and normalisation rules live in one profile file. If PinMAME exposes a group this profile does not describe — or describes wrongly — the fix belongs there.
Cite a source for anything you change — a manual page, a line in a working VPX script, PinMAME source, or a reading from the machine's own service menu. Claims without provenance cannot be validated.